
; Linloader, Boots Linux/ARM on RISC OS based systems.
; Copyright (C) 1999  Matthias Seifert and Timothy Baldwin
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 2 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

;	$Id: mcid.s,v 1.2 2003/03/29 12:07:04 pnaulls Exp $

OS_Byte				*	&6
OS_EnterOS			*	&16
OS_ReadSysInfo			*	&58
XOS_ReadSysInfo			*	&20058

p15	CP	15
c0	CN	0

	AREA	ASM, CODE, READONLY

	EXPORT	lll_is_riscstation
lll_is_riscstation
	mov	r0, #9
        mov     r1, #3
	swi	XOS_ReadSysInfo	; Read system info
        bvs     not_riscstation
        cmp     r0,#0
        beq     not_riscstation
        ldrb    r1,[r0,#0]      ; Test for R
        cmp     r1,#'R'
        bne     not_riscstation
        ldrb    r1,[r0,#1]      ; Test for i
        cmp     r1,#'i'
        bne     not_riscstation
        ldrb    r1,[r0,#2]      ; Test for s
        cmp     r1,#'s'
        bne     not_riscstation
        ldrb    r1,[r0,#3]      ; Test for c
        cmp     r1,#'c'
        bne     not_riscstation
        ldrb    r1,[r0,#4]      ; Test for S
        cmp     r1,#'S'
        bne     not_riscstation
        ldrb    r1,[r0,#5]      ; Test for t
        cmp     r1,#'t'
        bne     not_riscstation
        ldrb    r1,[r0,#6]      ; Test for a
        cmp     r1,#'a'
        bne     not_riscstation
        ldrb    r1,[r0,#7]      ; Test for t
        cmp     r1,#'t'
        bne     not_riscstation
        ldrb    r1,[r0,#8]      ; Test for i
        cmp     r1,#'i'
        bne     not_riscstation
        ldrb    r1,[r0,#9]      ; Test for o
        cmp     r1,#'o'
        bne     not_riscstation
        ldrb    r1,[r0,#10]      ; Test for n
        cmp     r1,#'n'
        bne     not_riscstation

is_risctation
        mov     r0,#1
        mov     pc,r14
not_riscstation
        mov     r0,#0
        mov     pc,r14



	EXPORT	lll_get_proc_id
lll_get_proc_id
	mrs	a2, CPSR
	swi	OS_EnterOS
	mrc	p15, 0, a1, c0, c0	; Read processor id
	msr	CPSR_cf, a2
	msr	CPSR_f, r14
	mov	pc, r14

	EXPORT	lll_get_mc_id
lll_get_mc_id
	mov	ip, r4

	mov	r0, #129
	mov	r1, #0
	mov	r2, #&FF
	swi	OS_Byte		; Read OS identifier (r1), corrupts r0 and r2

	cmp	r1, #&A3	; Is it at least RISC OS 3.5?

	movlt	r0, #0		; No -> must be MEMC
	movlts	pc, r14

	mov	r0, #2
	swi	OS_ReadSysInfo	; Read system info, returns values in r0-r4

	mov	r0, r0, LSR #16
	and	r0, r0, #&FF	; 0 = MEMC, 1 = IOMD

	teq	r0,#1		; Is it an IOMD?
	bne	return			; No -> exit

	mrs	r4, CPSR
	tst	r4, #&F
	swieq	OS_EnterOS	; Change into SVC mode

	mov	r1, #&03200000	; Base address of IOMD
	ldrb	r2, [r1, #&94]	; Low byte of IOMD ID
	orr	r0, r0, r2, LSL #16
	ldrb	r2, [r1, #&98]	; High byte of IOMD ID
	orr	r0, r0, r2, LSL #24

	msr	CPSR_cf, r4
return	mov	r4, ip
	msr	CPSR_f, r14
	mov	pc, r14

	END
